SEMICONDUCTORS · PASIR RIS

Soitec · Pasir Ris wafer campus

The Singapore campus manufactures engineered substrates. Soitec describes capacity ramping at its PR1 and PR1A facilities.

Operational · reported 10 Sept 2026Soitec
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Official source

Status is based on the cited official source. A review date does not guarantee live conditions.

Status evidence
10 Sept 2026
Record checked
10 Sept 2026
Soitec · view evidence

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Status & scale

Operating site; no single future completion date recorded.

At a glance

Expansion distinction
Operating campus with production ramp; announced maximum capacity is not treated as current output. Source ↗

Why it matters

Editorial context

Engineered substrates add a materials specialism to Singapore’s wafer ecosystem. A ramp is not proof of full utilisation.

Questions to follow

Research prompts · not assertions of future events
  • What newer operating or delivery evidence has been published?
  • Which connections to neighbouring institutions are documented?

Location precision

Soitec campus reference from OpenStreetMap; the marker does not trace building footprints.

Geographic reference ↗

Evidence & sources

Recorded history

No precisely dated milestone is recorded in this edition.

Edition reviewed 10 Sept 2026. Evidence dates do not imply a live site inspection. Campus and area references do not establish exact building footprints.